Field of the Invention
The present invention relates to high density memory devices, and particularly to memory devices in which multiple planes of memory cells are arranged to provide a three-dimensional 3D array.
Description of Related Art
3D memory devices have been developed in a variety of configurations that include stacks of conductive strips separated by insulating material, and vertical active strips between the stacks. Memory cells including charge storage structures are disposed at interface regions between intermediate planes of conductive strips in the stacks and the vertical active strips. String select switches are disposed at interface regions between a top plane of conductive strips in the stacks and the vertical active strips. Reference select switches are disposed at interface regions between a bottom plane of conductive strips in the stacks and the vertical active strips. In order to reliably control operations of the memory cells, it is desirable that the threshold voltages of string select switches and reference select switches are stable. When string select switches and reference select switches include charge storage structures as the memory cells, string select switches and reference select switches can be charged such that their threshold voltage may vary and thus require additional circuitry to program and erase the switches.
It is desirable to provide a structure for three-dimensional integrated circuit memory that provides string select switches and reference select switches with stable threshold voltages while memory cells are programmed or erased, without requiring additional circuitry to control the threshold voltages.